Multiprocessor Memory Model Verification
نویسندگان
چکیده
Using the system architects’ specified memory ordering as a function of execution, a multiprocessing system can be verified by monitoring not only that the result of an execution conforms to the required memory model, but that the result is exactly what the system architects intended. This allows a much more thorough verification of the system implementation, because in typical simulations many implementation errors do not propagate to memory model violations. This approach amplifies the coverage of an analysis using scarce architectural/mathematical insight via “informal” verification using simulation, which does not require the same insight to execute and interpret.
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